发明名称 |
Filter circuit |
摘要 |
<p>A filter circuit comprises a plurality of sampling and holding circuits for sampling and holding analog input signal with a predetermined sampling period, a calculation circuit for multiplying each the analog input signal by a predetermined multiplier, and for summing the multiplication results. The sampling and holding circuits are controlled in an electrical power such that the electrical power is decreased when holding. <IMAGE></p> |
申请公布号 |
EP0940916(A2) |
申请公布日期 |
1999.09.08 |
申请号 |
EP19990104188 |
申请日期 |
1999.03.02 |
申请人 |
YOZAN INC. |
发明人 |
ZHOU, CHANGMING;SUZUKI, KUNIHIKO;TOMATSU, TAKASHI |
分类号 |
H03H15/00;(IPC1-7):H03H15/00 |
主分类号 |
H03H15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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