发明名称 Method and apparatus for controlling reset of component boards in a computer system
摘要 An apparatus controls a signal that indicates to a plug-in component board that it is to be connected to a 64-bit data path in a computer system. The apparatus comprises a timing circuit for receiving a reset signal and providing first and second complementary logical signals in response thereto. A selection switch receives the first and second logical signals as well as a control signal and outputs a third signal as determined by the logical level of the reset signal. A method involves generating first and second complementary signals from a reset signal, selecting between the first complementary signal and a control signal, and outputting a third signal, the logical value of the third signal being determined by the logical value of at least one of the reset signal and the control signal.
申请公布号 US5948090(A) 申请公布日期 1999.09.07
申请号 US19980092681 申请日期 1998.06.05
申请人 COMPAQ COMPUTER CORPORATION 发明人 HEINRICH, DAVID;OLSON, ROBERT;TAVALLAEI, SIAMAK
分类号 G06F1/24;G06F13/40;(IPC1-7):G06F1/24;G06F13/24 主分类号 G06F1/24
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