发明名称 Bus configuration and input/output buffer
摘要 A system for signal transmission has at least one bus for the signal transmission and a reflection-prevention resistance provided on a stub connected to the bus for preventing reflection of signals at an intersection between the bus and the stub. The system includes termination resistances, and a switch unit for coupling the bus to termination voltage via the termination resistances in a first mode and for disconnecting the bus from the termination voltage in a second mode.
申请公布号 US5949252(A) 申请公布日期 1999.09.07
申请号 US19960754760 申请日期 1996.11.21
申请人 FUJITSU LIMITED 发明人 TAGUCHI, MASAO
分类号 G11C11/409;G06F3/00;G06F12/00;G06F13/16;G06F13/40;G11C7/10;G11C11/401;G11C11/407;H03K19/00;H03K19/0175;H03K19/0185;H03K19/0948;(IPC1-7):H03K19/018 主分类号 G11C11/409
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