摘要 |
<p>PROBLEM TO BE SOLVED: To shorten the activation time of the inner reset signal of a one chip microcomputer and to reduce a required area. SOLUTION: A reset signal control circuit contains a clock oscillation circuit 5 which is enabled by an outer interruption signal/INTRP and oscillates a clock signal corresponding to an input oscillation signal XIN, a rectifier 13 for outputting a signal corresponding to the voltage level of an output oscillation signal XOUT from the clock oscillation circuit 5, and a comparator 15 for comparing a prescribed reference voltage level with the voltage level of the output signal from the rectifier 13. When the comparator 15 is enabled by an outer interruption signal/INTEP and when the voltage level of the output signal is less than the reference voltage level, an activated inner rest signal RST- IN is generated. When the voltage level of the output signal is above the reference voltage level, the inner reset signal RST- IN is stopped.</p> |