| 摘要 |
PROBLEM TO BE SOLVED: To realize matched layout corresponding to variable capacity by simplifying only in the increment function of cyclic type address. SOLUTION: The device is equipped with a read control section 14 for independently controlling the read row/column shift register 10, 12 and with a write control section 15 for independently controlling the write row/column shift register 11, 13, performing write-in and read-out. Address selection in the row and column directions is made by means of a write/read column shift register 11, 10 that successively selects and circulates the write/read word lines of the memory cell in the row of the memory cell array 1 and by means of a write/read row shift register 13, 12 that successively selects and circulates the write/read bit lines of the memory cell in the column of the memory cell array 1. The circuit scale can be reduced, through the cyclic shift action of each shift register, by performing the increment operation of address. |
