发明名称 MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To reduce the peak value of a write current to be generated in the case of parallel write processing to plural flash memories. SOLUTION: A memory card 1 has plural flash memories FMa1... having electrically reloadable non-volatile memory cells and control means 2 and 3 for accessing the flash memories, and when performing parallel write operation to plural flash memories, the control means deviate a timing to impress a write voltage among these plural flash memories. Thus, the peak value of a write current to be generated in the case of parallel write processing to the plural flash memories can be reduced, and while suppressing the increase in the capacity of a power source circuit, time for write operation due to write interleaving can be shortened.</p>
申请公布号 JPH11242632(A) 申请公布日期 1999.09.07
申请号 JP19980044733 申请日期 1998.02.26
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 SHIRAISHI ATSUSHI;INOUE MANABU
分类号 G11C16/02;G06F12/00;G06F12/06;(IPC1-7):G06F12/06 主分类号 G11C16/02
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