| 摘要 |
In a method for fabricating a hemispherical grain silicon structure as a bottom electrode of a capacitor in an integrated circuit, poly-silicon is formed as the seed for nucleation instead of amorphous silicon. A silicon oxide layer 24 provided with a contact hole 22 is formed on a substrate 20. The contact hole is filled with polysilicon and patterned to form a capacitor electrode 26. Native oxide on the electrode is removed by H 2 or HCI solution and then, using chlorosilane as a precursor, a hemispherical grain silicon structure 28 is grown on the electrode by CVD to increase its capacitance. The by-products H 2 and HCI of the reaction prevent growth of the structure 28 on the silicon oxide layer 24. |
