| 摘要 |
<p>The asynchronous transfer mode circuit has an asynchronous transfer mode cell buffer memory (2) and an asynchronous transfer mode cell management device (1,3,4,5) for entering the asynchronous transfer mode cells in vacant buffer memory addresses provided by a vacant address management device (9), which can be coupled together in a chain by a buffer address management device (6,7,8) incorporating an address memory (8). An Independent claim for a control method for an asynchronous transfer mode circuit is also included.</p> |
