发明名称 TIMER CIRCUIT PROVIDED WITH SELF-DIAGNOSTIC FUNCTION
摘要 PROBLEM TO BE SOLVED: To easily confirm whether timer counter operation is normal or abnormal by incorporating a function for detecting the counter operation being abnormal according to the result of logical operation between the time of the timer counter circuit and a specific value. SOLUTION: In self-diagnostic function test mode (CNTTST='1'), input capture circuits 2 and 3 used in normal mode hold the counter value at (tn+1) time and counter value at tn time of the output of the timer counter circuit 1. In this case, an AND ALL '0' detecting circuit 4 ANDs the uninverted value at (tn+1) time and the inverted value at tn time to judge normal +1 count operation when the result is '0' and abnormal count operation when '1'. Then it is judged whether a clock is in operation or at a stop from the output level of a set preferential R/S flip-flop circuit 8 and when the operation of the timer counter is disabled, the clock signal for the timer counter stops.
申请公布号 JPH11239055(A) 申请公布日期 1999.08.31
申请号 JP19980042395 申请日期 1998.02.24
申请人 TOSHIBA CORP 发明人 OIKAWA KIYOHARU;SHIRAI KAORU
分类号 H03K21/40;H03K23/64;(IPC1-7):H03K23/64 主分类号 H03K21/40
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