| 摘要 |
A semiconductor device comprising a lower level pattern formed on a semiconductor substrate, an interlayer insulator film covering the lower level pattern, and an upper level pattern formed on the interlayer insulator film, a step being formed on a surface of the interlayer insulator film because of the lower level pattern. The upper level pattern having a dummy pattern formed integrally therewith to extend near to the step in a plan view or to extend so as to partially overlap with the step in the plan view. Alternatively, the lower level pattern has a dummy pattern formed integrally therewith to extend near to an edge of the upper level pattern in a plan view, or to extend so as to overlap partially with the edge of the upper level pattern in the plan view.
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