Servo circuit, digital PLL circuit and optical disk device

摘要

A speed error detecting portion detects a speed error which is a frequency difference between a reproduced clock signal which is reproduced from a recording medium and a reference clock signal. A first phase error detecting portion detects a phase error which is a phase difference between the reproduced clock signal and the reference clock signal. A servo signal generating portion generates a servo signal which is used for eliminating the speed error and phase error. A second phase error detecting portion detects a phase error which is a phase difference between a reproduced synchronization signal reproduced from the recording medium separately from the reproduced clock signal and a reference synchronization signal. A reference phase changing portion changes the phase of the reference clock signal based on the phase error detected by the second phase error detecting portion. A reference frequency changing portion changes the frequency of the reference clock signal based on the phase error detected by the second phase error detecting portion.