Interleaved power and impedance control using daughtercard edge connector pin arrangement

摘要

A plug in daughtercard with an edge connector having pins configured to maintain a low impedance power supply path and accurately control the impedance of lines carrying signals. A low impedance power supply path is provided with pins of the daughtercard organized in rows and columns with some rows providing all power supply voltage and ground return contact pins extending across the entire daughtercard edge. Rows providing power supply voltage and ground return are further interleaved between rows providing signal path connection pins to maximize the number of power supply voltage and return pins to assure a low impedance power supply path is provided to components throughout a daughtercard. Signal line impedance matching is provided using the rows of pins providing the power supply voltage and ground return connections. Ground return pins in such rows are coupled through metal plates which simulate a larger metal ground plane. Signal pins are then routed between the metal plates so that the metal plates serve as ground planes for AC signal carried through the pins. The distance between the signal pins and the metal plates are adjusted to provide a desired ground plane separation for impedance matching.