Multi-processor system which provides for translation look-aside buffer address range invalidation and address translation concurrently

摘要

In a multi-processor system, a translation look-aside buffer in a processor can be invalidated without stopping operations of other processors of the multi-processor system. Each processor has a range comparator including an address compare circuit which detects whether a logical address to access the main storage is in an address range being invalidated (e.g., updated), a pending indicator which stops translating the logical address when the address is detected to be in the address range, and a restart indicator which restarts translation of the logical address when the logical address is out of the address range.