CLM/ECL clock phase shifter with CMOS digital control

摘要

A CML/ECL clock phase shifter device provides a 360 DEG phase control range and, upon being provided with two CML clock signals related by a known phase difference, the device produces any desired phase in response to a control signal. The device uses a CMOS current switch which generates current signals having the amplitude adjustable with the control signal, which is a digital word. Differential pairs provide amplitude modulated current signals for the input clock and the variant of the input clock. Two MOS transmission networks selectively invert each amplitude modulated signal and sum the signals from each side on a load network. The phase control resolution is optimal over four quadrants for quadrature input clock signals.