发明名称 |
Method of fabricating a passivation layer for integrated circuits |
摘要 |
A metal layer (24) is formed on an isolation layer (22) to act as interconnections. Subsequently, a thin liner layer (26) is optionally formed along the surface of the metal layer (24) to serve as a buffer layer. An undoped silicate glass (USG) layer (28) is deposited on the liner layer (26). The USG layer (28) is formed using ozone and tetraethylorthosilicate (TEOS) as a source at a temperature of approximately 380 to 420 DEG C. Oxygen gas is used as a carrier for the ozone. The flow rate of the oxygen gas is approximately 4000 to 6000 sccm. Helium gas is used as a carrier for the TEOS. The flow rate of the helium is approximately 3000 to 5000 sccm. A silicon nitride layer (30) is deposited on the USG layer (28) using plasma enhanced chemical vapor deposition (PECVD). The silicon nitride layer (30) serves as a main passivation layer. The thickness of the silicon nitride layer (30) is approximately 3000 to 7000 angstroms.
|
申请公布号 |
US5943599(A) |
申请公布日期 |
1999.08.24 |
申请号 |
US19970920133 |
申请日期 |
1997.08.27 |
申请人 |
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
YAO, LIANG-GI;TU, YEUR-LUEN;HUANG, SEN-HUAN;TSAI, KWONG-JR;CHERNG, MENG-JAW |
分类号 |
H01L21/314;H01L21/316;H01L21/318;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/314 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|