| 摘要 |
Using a CVD method, there is deposited, on a semiconductor substrate, a first silicon oxide layer on which a porous layer is then deposited. The porous layer is then etched to form a wiring groove. Using a CVD method, a second silicon oxide layer is deposited throughout the surface of the porous layer, and the first and second silicon oxide layers are etched to form a through-hole therein. Then, a conductive layer is deposited throughout the surface of the semiconductor substrate. Then, the conductive layer is subjected to CMP to form a wiring layer composed of the conductive layer.
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