发明名称 Real time dram page boundary adjustment
摘要 A memory system allows page boundaries to be crossed in successive reads of a Dynamic Random Access Memory (DRAM) without the necessity of waiting for another page of memory to be read out of a memory array of the DRAM. The memory is divided into multiple banks, each of which has a Bit-Line Sense Amplifier (BLSA) capable of holding one page of memory. Successive pages of memory are stored in separate banks, and may be activated or deactivated while data from another page is being read. The memory system is operable whether the successive reads are sequential or out-of-order.
申请公布号 AU2493399(A) 申请公布日期 1999.08.23
申请号 AU19990024933 申请日期 1999.02.03
申请人 S3 INCORPORATED 发明人 HONG-GEE FANG
分类号 G06F12/02;G11C7/10;G11C8/12 主分类号 G06F12/02
代理机构 代理人
主权项
地址