| 摘要 |
The device produces a synchronous output signal (STM-N) consisting of successive transport modules synchronized to a frame clock from a digital input signal (PDH). It contains a receiver unit (SI), buffer memory (BUF), write device (WM) for writing input signal data bits into buffer memory with a write clock, a reader (RM) for reading bits from the buffer with a read clock and a transmitter unit (SO) for the synchronous output signal. A packetizing device (PAK) between the input unit and buffer memory packs the input signal into sub-units of the transport module. The write device writes the input signal data bits from the sub-units into the buffer. The write clock (WCLK) is lower or higher than the read clock (RCLK). An Independent claim is also included for a method of generating a synchronous output signal.
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