发明名称 |
Circuit for processing memory cell data |
摘要 |
A circuit apparatus for evaluating a data content of memory cells of an integrated semiconductor memory, which memory cells are disposed along bit lines and word lines. The circuit apparatus has a voltage compensation device with voltage compensation elements which are connected for the purpose of voltage coupling of in each case two neighboring bit lines and which enable compensation for a capacitive coupling between the bit lines. |
申请公布号 |
EP0897181(A3) |
申请公布日期 |
1999.08.18 |
申请号 |
EP19980111559 |
申请日期 |
1998.06.23 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
BREDE, RUEDIGER;SAVIGNAC, DOMINIQUE, DR. |
分类号 |
G11C11/409;G11C7/06;G11C11/4091;G11C11/4094 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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