Data processor

摘要

A start signal is generated which selects, from among a plurality of sub-periods resulting from division of one cycle period of an external clock signal and each having a length equivalent to one cycle period of an internal clock signal, a sub-period at a corresponding position to a setup time of an external device. When the start signal is generated after a CPU (central processing unit) issues a transmission request signal, there is made a transition to a transmission state. An address signal to the external device is held until data transmission starts between the CPU and the external device in synchronization with the external clock signal in the transmission state.