发明名称 CLOCK RECOVERY SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a clock recovery system that relieves the load on CPU and prevents mis arithmetic operations due to updating of a program time reference value PCR and a system time clock STC on the way. SOLUTION: The system consists of a clock generating means 3 that generates a recovered reference clock with a period in response to a control signal, a synchronization information acquisition means 124 that obtains recovery reference synchronization information from the recovered reference clock, an arithmetic means 10 consisting of the hardware that sequentially calculates error information denoting an error of the recovered reference clock with respect to a reference clock based on the reference synchronization information and the recovered reference synchronization information set sequentially with data to be recovered in a packet, and a CPU 16 that sequentially acquires error information via a bus with a bit width smaller than a bit width of the reference synchronization information and a bit width of the recovered reference synchronization information and provides an output of a control signal used to change a period of the recovered reference clock so as to decrease an error indicared by the acquired error information.
申请公布号 JPH11225136(A) 申请公布日期 1999.08.17
申请号 JP19980025362 申请日期 1998.02.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAMOTO TAKESHI
分类号 H04N5/06;H04L7/00;H04L12/70 主分类号 H04N5/06
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