发明名称 SLIDING CORRELATOR MATCHED FILTER AND DEMODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the power consumption much more regardless of a simple and small scale configuration by using a conventional operational amplifier so as to conduct analog arithmetic processing. SOLUTION: The sliding correlator, multiplies a pseudo random noise PN code by an analog input signal subjected to code division multiplex CDMA modulation under the control of a differential amplifier 60 and a multiplier switch 20, an information storage capacitor 50 stores the result of multiplication, a storage result by one symbol is added by the control of a summing switch 40 to obtain a correlation output.
申请公布号 JPH11225092(A) 申请公布日期 1999.08.17
申请号 JP19980025670 申请日期 1998.02.06
申请人 KOKUSAI ELECTRIC CO LTD 发明人 IMAIZUMI ICHIRO;HONMA MASAHITO;MIYATANI TETSUHIKO;ABE SHUNJI;KATO HISASHI;TOHORI HIDENORI;HIGUCHI HIROSHI
分类号 H03M1/66;H04B1/707;H04B1/7093;H04B1/7095 主分类号 H03M1/66
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