发明名称 STATIC RAM
摘要 A static RAM comprises: column select circuits for connecting a plurality of pairs of corresponding complementary data lines at a unit of each pair with common complementary data lines; and redundant circuits each composed of the complementary data line pair and the column select circuit corresponding to the unit. Load MOSFETs of the complementary data lines are arranged close to the column select circuits to inhibit the column selecting operations by a decoder circuit and turn off the load MOSFETs when fuse means is cut. An access to a defective address is detected by a redundant decoder stored with the defective address, when the fuse means is selectively cut, to select the column select circuits of the redundant circuit.
申请公布号 KR100216107(B1) 申请公布日期 1999.08.16
申请号 KR19920000720 申请日期 1992.01.20
申请人 HITACHI LTD. 发明人 YANAGISAWA, KAZUMASA;HIRAISHI, ATSUSHI;AOKI, HIDEYUKI;OGUCHI, SATOSHI;OHKUMA, DAYUKI
分类号 G11C11/413;G11C29/00;G11C29/04;H01L21/82;H01L27/10;(IPC1-7):G11C29/00 主分类号 G11C11/413
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