发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING MINIATURE MULTILEVEL WIRING STRUCTURE LOW IN PARASITIC CAPACITANCE AND PROCESS OF FABRICATION THEREOF
摘要 After a pattern transfer of a first pattern image to a lower photo-sensitive layer of first material, a second pattern image is transferred to an upper photo-sensitive layer of second material higher in photo-sensitivity than the first material, and the first image and the second image are concurrently developed so as to form a composite etching mask through a simple process.
申请公布号 KR100215613(B1) 申请公布日期 1999.08.16
申请号 KR19960033112 申请日期 1996.08.09
申请人 NEC CORPORATION 发明人 HAYASHI, YOSHIHIRO;ONODERA, TAKAHIRO
分类号 H01L21/302;G03F7/00;G03F7/095;G03F7/20;H01L21/027;H01L21/3065;H01L21/312;H01L21/3205;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/768 主分类号 H01L21/302
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