发明名称 |
Reconfigurable co-processor with multiple multiply-accumulate units |
摘要 |
<p>A data processing system includes a digital signal processor core (110) and a co-processor (140). The co-processor (140) has a local memory (141, 145, 147) within the address space of the said digital signal processor core (110). The co-processor (140) responds commands from the digital signal processor core (110). A direct memory access circuit (120) autonomously transfers data to and from the local memory (141, 145, 147) of the co-processor (140). Co-processor commands are stored in a command FIFO memory (141) mapped to a predetermined memory address. Control commands includes a receive data synchronism command stalling the co-processor (140) until completion of a memory transfer into the local memory (141, 145, 147). A send data synchronism command causes the co-processor (140) to signal the direct memory access circuit (120) to trigger memory transfer out of the local memory (141, 145, 147). An interrupt command causes the co-processor (140) to interrupt the digital signal processor core (110). <IMAGE></p> |
申请公布号 |
EP0935189(A2) |
申请公布日期 |
1999.08.11 |
申请号 |
EP19990200309 |
申请日期 |
1999.02.03 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
GATHERER, ALAN;LEMONDS, CARL E., JR.;HOCEVAR, DALE E.;HUNG, CHING-YU |
分类号 |
G06F9/302;G06F9/38;(IPC1-7):G06F9/38 |
主分类号 |
G06F9/302 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|