| 摘要 |
An address program circuit 11 provided in a semiconductor memory device receives an internal address signal which corresponds to an address signal, and outputs a signal /RE1 for causing the switching operation from a defective memory cell to a redundant memory cell. One fuse of each pair of fuses F10-1 and F10-2, F11-1 and F11-2, . . . , F1n-1 and F1n-2 in each of selection portions S0, S1, . . . Sn is cut off in response to the address of the defective memory cell, thereby the signal /RE1 being made active upon receipt of a predetermined internal address signal. With this structure, the defective memory cell may be remedied without generating any complementary internal address corresponding to the address signal as inputted externally.
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