发明名称 |
Delay circuit and method |
摘要 |
A reduced area delay circuit and method are disclosed. The delay circuit uses a constant current source and a constant current drain to charge and discharge a capacitor and thus control the delay time of the delay circuit. The constant current source and drain can be implemented using current mirrors formed by configuring MOSFET transistors in a common source configuration. The delay circuit method includes the steps of receiving an input signal, delaying the input signal by using a constant current source or drain in combination with a capacitor, and then buffering the voltage on the capacitor using two inverters. A programmable delay circuit is also disclosed by adding additional pairs of current mirrors to the delay circuit and selectively enabling the pairs to adjust the delay time.
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申请公布号 |
US5936451(A) |
申请公布日期 |
1999.08.10 |
申请号 |
US19970897187 |
申请日期 |
1997.07.21 |
申请人 |
STMICROELETRONICS, INC. |
发明人 |
PHILLIPS, WILLIAM A.;PAPARO, MARIO;CAPOCELLI, PIERO |
分类号 |
G05F3/24;H03K5/13;(IPC1-7):H03K5/13 |
主分类号 |
G05F3/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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