| 摘要 |
A semiconductor process for forming a gate electrode of an MOS transistor. A gate dielectric is deposited on an upper surface of a semiconductor substrate. A dielectric constant of the gate dielectric layer is in the range of approximately 25 to 300. A thickness of the gate dielectric is in the range of approximately 50 to 1,000 angstroms. A conductive gate layer is then formed on the gate dielectric layer. A first nitrogen distribution is then introduced into the gate dielectric layer. The introduction of the first nitrogen distribution is typically accomplished by implanting a first nitrogen bearing species into the gate dielectric layer. Ideally, a peak impurity concentration of the first nitrogen distribution is located at an interface between the semiconductor substrate and the gate dielectric layer. Thereafter, a second nitrogen distribution is introduced into the gate dielectric layer. The peak impurity concentration of the second nitrogen distribution is ideally located at approximately an interface between the gate dielectric layer and the conductive gate layer. In the preferred embodiment, the gate dielectric layer includes an oxide incorporation a material such as beryllium, magnesium, zirconium, calcium, titanium, or tantalum.
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