摘要 |
PROBLEM TO BE SOLVED: To realize a timing signal generating circuit capable of generating accurate timing signal. SOLUTION: A coarse timing signal 7 varying its level in accordance with the pulse of an input clock signal 6 is generated and when multiple phase clock signals 8 with different phases are generated in a timing synchronizing with the input clock signal 6, a pulse is generated in accordance with the phase of the clock signal of one of the multiple phase clock signal 8 selected following the fine timing data 5 at the time coarse timing signal 7 is '1'. As it is output as a fine timing signal 9, the fine timing signal 9 can be produced regardless of the constitution that delays the timing signal varying the pulse intervals. By this, the degradation of the timing accuracy due to a pattern effect and so accurate timing signal can be generated. |