| 摘要 |
A power-supply circuit 121 generates a potential Vw which is approximately the higher of a power-supply potential VDD and a potential Vo at an output to set the potential Vw at an N-well of a pMOS pull-up transistor Qu equal to or higher than the potential at the source S and the drain D of the pMOS transistor Qu. The power-supply circuit 122 generates a potential Vs approximately equal to VDD-Vth when Vo<VDD, and turns off when Vo>VDD to prevent a current from flowing from the output OUT through the pMOS transistor Qu to the power-supply potential VDD, where Vth is the threshold voltage of the MOS transistors.
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