| 摘要 |
PROBLEM TO BE SOLVED: To locate a failure at high speed using a logic LSI as a line monitor by checking each block for abnormality in electrical characteristics using an abnormal block check means and locating the abnormality in an abnormal block. SOLUTION: A wafer is checked for abnormality in appearance using an appearance inspection unit (S1) and the coordinate value at an abnormal point is calculated the coordinate value of each LSI chip and extracted (S2). Upon finishing formation of an electric circuit on the wafer, electrical characteristics are measured for every LSI chip (S3). If an abnormality is detected in electrical characteristics of an LSI chip for which appearance abnormality is detected (S1), a block on the LSI chip corresponding to the coordinate of appearance abnormality is extracted (S4). A decision is then made whether an IDDQ abnormality is present in the extracted block or not (S5). |
