发明名称 NETWORK SYNCHRONIZING SIGNAL RECOVERY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To allow stages after a faulty point to be restored to an original frame phase by supplying an accurate network frame signal to the stages, even at occurrence of a momentary interruption continued for a long time or after resetting of a channel interface circuit. SOLUTION: A counter 52 generates an internal frame signal S6 following after a network frame signal S2 in synchronized operation. Furthermore, in the synchronized operation, a reset signal generating circuit 55 and counters 56, 57, 58, 59 function to measure a phase difference between the internal frame signal S6 and a self-running frame signal S13 at a prescribed period. A memory 60 and a mean value calculation section 61 generate phase difference information as a mean value of four measurements of the phase difference. At occurrence of a state out of synchronization, the counter 52 generates a self-running internal frame signal S6 based on a self-running clock S3 and corrects the period of the internal frame signal S6, in response to the phase difference information at each prescribed period.
申请公布号 JPH11215544(A) 申请公布日期 1999.08.06
申请号 JP19980011163 申请日期 1998.01.23
申请人 TOSHIBA CORP 发明人 SAKAI SHIZUMARO
分类号 H04M3/00;H04B7/26;H04W24/00;H04W56/00 主分类号 H04M3/00
代理机构 代理人
主权项
地址