发明名称 Integrierter Speicher
摘要 The circuit second memory area stores error correction data for data to be stored in the first memory area. It stores the error correction data in the first, but not in the second mode of operation. In the second mode of operation the error correction function is deactivated. The data are stored in the first memory location with storing additional error correction data in the second memory areas. In the first mode, the data stored have high error security e.g. program data. In the second mode the data have error possibility e.g. audio data.
申请公布号 DE19804035(A1) 申请公布日期 1999.08.05
申请号 DE1998104035 申请日期 1998.02.02
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 MCCONNELL, RODERICK, DR., 81539 MUENCHEN, DE;RICHTER, DETLEV, 81827 MUENCHEN, DE
分类号 G06F11/10;G11C29/00;G11C29/42;G11C29/52;(IPC1-7):G11C29/00 主分类号 G06F11/10
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