发明名称 |
Semiconductor device with a metal layer for supplying a predetermined potential to a memory cell section |
摘要 |
A semiconductor device according to the present invention includes: a semiconductor chip; and memory and logic sections formed on the semiconductor chip. The memory section includes: an array of memory cells; a sense amplifier circuit; and memory interconnects respectively provided in a number n (where n is a positive integer) of interconnect layers. The logic section includes logic circuits having logic interconnects respectively provided in a number n+m (where m is a positive integer) of interconnect layers. A metal layer is formed in one of (n+1)th to (n+m)th interconnect layers, covers the array of memory cells and supplies a predetermined potential to the memory section.
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申请公布号 |
US5933364(A) |
申请公布日期 |
1999.08.03 |
申请号 |
US19990237853 |
申请日期 |
1999.01.27 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
AOYAMA, YASUHIRO;OOTA, KIYOTO;SHIMAKAWA, KAZUHIKO |
分类号 |
H01L27/108;G11C5/02;G11C5/06;G11C5/14;G11C11/401;H01L21/8242;(IPC1-7):G11C5/06 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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