| 摘要 |
The ferroelectric semiconductor memory cell comprises: a ferroelectric layer having a first face and a second face; a semiconductor layer disposed on the first face of the ferroelectric layer so as to have different conductivity values depending on a polarization state of the ferroelectric layer, the semiconductor layer having a first end and a second end; and a conductive layer disposed on the second face of the ferroelectric layer, the conductive layer being electrically connected to the first end of the semiconductor layer, wherein a first voltage or a second voltage respectively corresponding to a first value and a second value of the binary information is applied at the second end of the semiconductor layer while applying a third voltage having a potential level between the first and second voltages at the first end of the semiconductor layer, thereby varying the polarization state of the ferroelectric layer so that the binary information is written in the ferroelectric semiconductor memory cell.
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