| 摘要 |
PURPOSE:To simplify a circuit by reproducing a clock only with a digital circuit while controlling a direct digital synthesizer (DDS) corresponding to the plural digital bits of a clock phase error detector. CONSTITUTION:The digital signal outputs of first and second analog/digital converters 5 and 6 are demodulated by the regenerative carrier wave of a digital carrier wave reproducer 8 at a demodulator 7. The digital data sequence of that demodulated output are transmitted to the digital carrier wave reproducer 8 and a clock phase error detector 9. Then, the digital carrier wave reproducer 8 outputs the regenerative carrier wave corresponding to the digital data sequence, the clock phase error detector 9 detects the phase error of the clock corresponding to the digital data sequencer, it is inputted to a frequency control input 52 of a DDS 10 correpsonding to the digital signal of plural bits, and the regenerative clock is outputted. Further, a reference signal generator 1 inputs a signal to a reference clock input 51 of the DDS 10 and applies a fixed reference signal. |
