| 摘要 |
A semiconductor testing system that performs real-time adjustment of programmed values for test signals using an interface between a system controller and the pin resources. The interface includes a calibration memory that contains timing offset values and amplitude level offset and gain values. An arithmetic logic unit combines these compensation values with the programmed values. The compensated values are then sent to test system registers that control pin resources, such as pin electronics of the semiconductor testing system.
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