Semiconductor integrated circuit having DRAM mounted on semiconductor chip

摘要

In a semiconductor integrated circuit, a CPU (2), a DRAM (3), and a bus controller (5) are mounted on a same semiconductor chip. The bus controller (5) has a refresh control circuit (7, 70) including a refresh request circuit to output a refresh request at a constant timing, a forced refresh request circuit to output the refresh request at an optional timing that is different from the constant timing, and a refresh request stop circuit to output the refresh request forcibly.