METHOD AND APPARATUS FOR ENFORCING ORDERED EXECUTION OF READS AND WRITES ACROSS A MEMORY INTERFACE

摘要

A memory interface is provided between a processor and a memory subsystem which is capable of multiple concurrent transactions or accesses. The interface between the processor and the memory carries read and write operations as well as "barrier" operations, where a barrier operation signals the non-reorderability of operations. In one variation, the memory interface is an interface to one or more memory mapped input/output (I/O) devices or computational devices.