LDMOS power device

摘要

A LDMOS transistor (10) having a reduced surface drain (RSD) region (15), but otherwise similar to a conventional planar LDMOS transistor. The RSD region (15) is used to space the drain region (17) from the gate (14). It is formed after the polysilicon process used to form gate (14) (FIGURE 5), and is therefore self-aligning with respect to the gate (14). The process used to form the transistor (10) is compatible with the process used for existing planar LDMOS devices.