发明名称 Task and stack manager for digital video decoding
摘要 A reduced instruction set CPU is programmed to provide software-controlled task management, a stack, and to manage virtual instruction memory. The CPU performs a task management procedure in which the CPU repeatedly checks task flags, and if a task flag is set, performs the task associated with the set task flag. If multiple task flags are set, the highest priority task of those associated with set task flags is performed. Whenever a subroutine call is needed, the subroutine call is implemented by calling a stack management routine. The stack management routine retrieves and stores a return address into a location in DRAM identified by a stack pointer, increments the stack pointer, and then executes a CALL instruction, causing program execution to sequence to the desired subroutine. At the end of each subroutine, a RETURN instruction is executed, in response to which, program execution returns to the stack management routine, and the stack management routine decrements the stack pointer, loads the previously-stored return address from a location in DRAM identified by the stack pointer register, and then causes program execution to sequence to the loaded return address. The stack management routine also provides virtual instruction memory management, by determining whether a routine is resident in the on-chip instruction memory available to the RISC CPU prior to calling or returning to the routine. If not, the virtual instruction memory management routine transfers the desired routine from off-chip DRAM into the on-chip instruction memory, and then executes the call or return.
申请公布号 US5928321(A) 申请公布日期 1999.07.27
申请号 US19970866419 申请日期 1997.05.30
申请人 SONY CORPORATION;SONY ELECTRONICS, INC. 发明人 OZCELIK, TANER;GADRE, SHIRISH C.
分类号 G06F9/42;G06F9/48;(IPC1-7):G06F13/00 主分类号 G06F9/42
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