发明名称 |
Apparatus to guarantee TLB inclusion for store operations |
摘要 |
A computer system includes a processor and a cache and memory management unit. The processor includes a means for retiring instructions in program order. The cache and memory management unit includes means for detecting when a translation has been evicted from a lookaside buffer and means for communicating eviction information to the means for retiring instructions in program order. The means for retiring instructions in program order includes means for holding a storage related instruction which causes a miss in the lookaside buffer or in the cache in a first pass of execution until the instruction becomes the oldest storage related instruction in program sequence and further includes means responsive to the eviction information for flushing all storage related instructions except the current storage related instruction. The system avoids the occurrence of misses in the buffer late in execution (e.g., PASS 2 or later), thus avoiding a necessity for complex recovery provisions.
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申请公布号 |
US5930832(A) |
申请公布日期 |
1999.07.27 |
申请号 |
US19960660560 |
申请日期 |
1996.06.07 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HEASLIP, JAY GERALD;HERZL, ROBERT DOV;TRAN, ARNOLD STEVEN |
分类号 |
G06F12/10;(IPC1-7):G06F12/10 |
主分类号 |
G06F12/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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