发明名称 ROM bit sensing
摘要 A read only memory including: a plurality of memory cells arranged in x rows and y columns in an array; x wordlines each connected to y memory cells in a respective row; y bitlines each associated with x memory cells in a respective column; m reference bitlines each corresponding to n bitlines, each of the reference bitlines having x reference cells each connected to a respective wordline; and m sense amplifiers each having a first input terminal connected to a respective n bitlines and having a second input terminal connected to one of the reference bitlines, and each being responsive to a difference between a signal on one of the n bitlines and a signal on one of the reference bitlines.
申请公布号 US5930180(A) 申请公布日期 1999.07.27
申请号 US19970886616 申请日期 1997.07.01
申请人 ENABLE SEMICONDUCTOR, INC. 发明人 CALLAHAN, JOHN M.
分类号 G11C7/06;G11C17/12;(IPC1-7):G11C16/04 主分类号 G11C7/06
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