| 摘要 |
FIELD: mobile communication terminals. SUBSTANCE: generator has modulo-18 counter of input sync pulses for shaping column address bits, modulo-32 counter of input sync pulses operating in response to carry signal coming from modulo-18 counter for shaping calculated value, and multiplexor for varying position of output bits of modulo- 32 counter in response to data speed selection signals for interlaced generation of line address bits. EFFECT: simplified design. 10 cl, 11 dwg, 3 tbl
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