发明名称
摘要 PURPOSE:To compensate digital data so that gradations '0' and '1' are always reproduced. CONSTITUTION:From at least one digital data obtained by executing a logical operation of at least a part of digital data D1-D3 of inputted upper n-k bits, for instance, 3 bits by logical elements such as AND elements 5A, 5, OR elements 6A, 7, etc., and inputted digital data, digital data of the lower (k) bits, for instance, the lowest digit bit is selected by switching a movable contact 2a of a switch 2B, and this selected digital data is outputted as (n) bits, for instance, 4 bits together with the inputted digital data.
申请公布号 JP2922691(B2) 申请公布日期 1999.07.26
申请号 JP19910298968 申请日期 1991.11.14
申请人 MITSUBISHI DENKI KK 发明人 SHIBATA SUSUMU;TAKAHASHI SEIKI
分类号 G09G3/20;G06F3/05;G06F5/00;G06F12/04;G06F12/06;G09G3/36;G09G5/00;G09G5/02;G09G5/36;H03M7/00;(IPC1-7):G09G5/36 主分类号 G09G3/20
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