Data processing system with overlaid paged memory control registers

摘要

A data processing system has a CPU (12) that accesses memory (16-18) through a memory management interface (14). The memory management interface (14) supports paging of modules of nonvolatile memory (16) into a defined paged memory area in the memory map. Memory control registers (80-87) to control programming and erasing of the modules of nonvolatile memory are simultaneously mapped into the memory map at a defined memory register area, wherein a page (90-97) of nonvolatile memory and its associated memory control registers (80-87) are selected and mapped into their respective defined areas in the memory map based on a single page select register (44). <IMAGE>