| 摘要 |
<p>A non-linear digital-to-analog converter has a k bit parallel input (1, 1a). The M most significant bits are supplied to a first stage (2) whereas the N least significant bits are supplied to a second stage (3), where (M+N)>k. The first stage (2) comprises a decoding circuit which supplies first and second consecutive ones (vl, vh) of the 2<m> reference voltages to the second stage (3), where M>m. The second stage (3) is a variable resolution linear digital-to-analog converter which receives the selected reference voltages (vl, vh) and performs a linear digital-to-analog conversion between these voltages. A piecewise linear approximation to a non-linear function is performed such that the linear elements of the approximation can be of different widths in the digital input domain. <IMAGE></p> |
