发明名称 |
Techniques and circuits for high yield improvements in programmable devices using redundant routing resources |
摘要 |
The present invention provides a method and apparatus for high yield improvements in programmable logic devices using redundancy. The present invention concerns a programmable logic device comprising a plurality of routings lines coupled to a plurality of logic blocks when programmed. During programming, a path is routed through the routing lines by programming the selected programmable elements. The selected programmable elements are located at each interconnect point between at least two routing lines or two segments of a routing lines along the path. The programmable elements include at least two interconnect circuits coupled in parallel. The programmable element is successfully programmed when at least one of the interconnect circuits is functional after programming.
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申请公布号 |
US5925920(A) |
申请公布日期 |
1999.07.20 |
申请号 |
US19960662056 |
申请日期 |
1996.06.12 |
申请人 |
QUICKLOGIC CORPORATION |
发明人 |
MACARTHUR, JAMES;LACEY, TIMOTHY M. |
分类号 |
H03K19/177;(IPC1-7):H03K19/177 |
主分类号 |
H03K19/177 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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