| 摘要 |
A NAND cell memory block array includes word lines and active regions arranged in X and Y directions. When a voltage of Vcc is applied to the word lines arranged in the X direction, a voltage of -Vcc is applied to the word lines arranged in the Y direction to turn off all transistors placed under the word lines arranged in the Y direction, thereby blocking the current path of the transistor. When a voltage of Vcc is applied to the word lines arranged in the Y direction, a voltage of -Vcc is applied to the word lines arranged in the X direction to turn off all transistors placed under the word lines arranged in the X direction, thereby blocking the current path of the transistor. The memory blocks arranged in the X and Y direction interweave or interleave with each other such that integration density can be doubled.
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