Halbleiterspeicheranordnung und Verfahren zu deren Herstellung

摘要

The invention relates to a semiconductor memory system comprising a semiconductor body (1) in which memory cells (SZ1, SZ2) are configured which each have a selection transistor (T2) and memory means (CG, CGS, CGD) for memorising an electrical charge. The semiconductor body (1) has columns, the lateral surfaces (4, 6) of which extend at least approximately in a vertical manner. Each memory cell (SZ1, SZ2, SZ3) is embodied on a lateral surface (4; 6) of one of the columns (2).